The aim of this course is to introduce the basics of electrical circuits as well as the mathematical tools used to represent and analyze them. Topics covered include: Kirchhoff's circuit laws; basic electrical components and circuits; circuit theorems; circuit topology; DC and AC circuit equations; Sinusoids and Phasors; Sinusoidal steady-state analysis; transformers; 3-phase circuits. Design and lab exercises are also significant components of the course. By the end of the course, the student must be able to analyze and build simple electrical circuits.
A continuation of Electronics course. Models for integrated-circuit active devices; Bipolar and MOS integrated-circuit technology; single transistor and multiple transistor photo1amplifiers; current mirrors, active loads and references; output stages; frequency response of integrated circuits. Upon successful completion of this course students should have: a good understanding of the operation of semiconductor devices; a good understanding of small signal and multistage amplifiers (including biasing and frequency response); a good understanding of output stages. Hands-on experience, practical applications and projects.
A continuation of Advanced Electronics course. Differential pairs; electrical noise; feedback; oscillators; frequency response and stability of feedback amplifiers; Low Noise Amplifiers; operational Amplifiers; PLLs/DLLs; sampling and hold; comparators; ADC/DAC. Hands-on experience, practical applications and projects.
Course description (Lab exercises): Diode charasteristic. Bipolar and MOS transistor charasteristics. Single transistor amplifiers and buffers. Voltage and current gain. Input and output resistance. Saturation and harmonic distortion. Two-stage amplifiers. Current mirrors. Differential amplifiers. Frequency responce of amplifiers.
The aims of course CE330, "Digital VLSI Systems", include (1) understanding the electrical and circuit transistor properties when designing Digital Systems in moden manufacturing processes, (2) getting to grips with the theoretical and practical fundamentals for performing digital circuit design at the transistor and RC interconnections level, (3) obtaining practical experience in custom pgsical design both at the layout level (using the MAGIC VLSI tool), as well as electrical level simulation (using NGSPICE), and (4) gaining an understanding of the physical, practical and parasitic characteristics of MOS transistors, which affect and influence the design either for high-speed or low-power circuits.
The aims of CE430,"Digital Systems Laboratory", include (1) learning the theoretical fundamentals of digital systems design, using HDL (Verilog), (2) familiarisation with practical digital design flows and implementation methodologies, with emphasis on programmable logic, namely FPGAs, (3) combining theory and practice in implementing several small design projects in the laboratory using some examples of algorithms, e.g. state minimisation and two-levelcircuits minimisation. Course projects include: a driver for multiple seven segment displays, a UART sender receiver implementation, a VGA framebuffer implementation, as well as an LCD controller implementation.
The aim of CE437 is to familiarize with Logic Synthesis and Verification EDA algorithms. Two level exact and heuristic minimisation algorithms are presented, including the UCP, B2B approach of Quine-McCluskey two-level minimisation, as well as the fundamental algorithmic steps of the ESPRESSOO minimiser. The use of BDDs in practical practical Logic Synthesis and Verification are reviewed. Longest and Shortest path algorithms, for STA are detailed, as well as applications of Network Flow algorithms. Multi-level Boolean networks and operations for structuring Boolean networks are presented, including ELIMINATION, DECOMPOSITION, EXTRACTION, SIMPLIFICATION and SUBSTITUTION operators, as well as Boolean (DC) theory for Multi-Level Boolean Network optimisation. Technology mapping and ATPG algorithms are also presented, covering the entire front-end steps of a digital design flow.
The aim of CE439 is to familiarize with Physical Design EDA algorithms. Algorithms for Partitioning and Clustering are presented, with their potential applications, including use in minimising connectivity, GP or hierarchy control. Longest and Shortest path algorithms, for STA are detailed, as well as applications of Network Flow algorithms. Analytical and non-analytical GP algorithms are presented in detail, focusing on the various net models (P2P, CLIQUE, HYBRID, B2B, LSE, WA) and GP formulations, theoretical and practical of how a GP works. Legalisation algorithms, distance or HPWL-driven are presented, and for 2D or 3D ICs are also presented, used for rendering the GP result legal. The complecities of a timing-driven flow are presented, including how DP may be timing-driven, to improve slack. Floorplanning algorithms are reviewed, capable of compacting blocks into a minimum core area. The concepts of parallelization and algorithmic efficiency are covered throughout the course.
The aim of CE653 is to introduce the fundamental concepts of clockless or asynchronous circuit design, relevant design styles for asynchronous control and datapath logic, high-level models for concurrent systems, as well as EDA algorithms for asynchronous logic, including logic synthesis, timing analysis, hazard detection and timing model verification. The course presents (1) asynchronous channel based design, using various handshake protocols, (2) template based design, including micropipelines and the De-synchronization methodology, (3) modelling and logic synthesis of asynchronous control circuits based on PTnets and Multiple Synchronised FSMs (MSFSMs), (4) asynchronous timing modes, hazards, races and their cerification using multi-value logic, (5) indicating logic for datapatch, (6) timing analysis and optimisation techniques for asynchronous circuits and (7) GALS systems.