PUBLICATIONS

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CONFERENCE PAPERS

  1. D. K. Arvind and C. P. Sotiriou, Multiple Overlapping Register Files for Micronet Clusters, Proceedings of the 2nd UK Asynchronous Forum, Newcastle 1998.

  2. F. Plessas, A. Miaoudakis, Gr. Kalivas, K. Efstathiou, "Wireless Data Transfer System", in Technology and industrial applications of power electronics - industrial electronics, Athens, Sep. 28-29, 2000.

  3. C. P. Sotiriou, Direct-Mapped Asynchronous Finite-State Machines in CMOS Technology, Proceedings of the IEEE ASIC/SOC 2001 Conference, Washington D.C., 5 pages, September 2001.

  4. I. Papaefstathiou and C. P. Sotiriou, Read, Use, Simulate, Experiment and Build: An Integrated Approach for Teaching Computer Architecture, Workshop on Computer Archi- tecture Education (WCAE 2002), held in conjunction with the 29th International Sumposium on Computer Architecture, Anchorage, Alaska, USA, May 2002.

  5. C. P. Sotiriou, Implementing Asynchronous Circuits using a Conventional EDA Tool- Flow, Proceedings of the 39th ACM/IEEE Design Automation Conference (DAC), pp. 415-418, New Orleans, USA, July 2002.

  6. J. Cortadella, A. Kondratyev, L. Lavagno and C. P. Sotiriou, A Concurrent Model for De-Synchronization, Proceedings of the 12th (ACM/IEEE) International Workshop on Logic and Synthesis (IWLS), 10 pages, Laguna Beach, California, USA, May 2003.

  7. M. Amde, I. Blunno and C. P. Sotiriou, Automating the Design of an Asynchronous DLX Microprocessor, Proceedings of the 40th ACM/IEEE Design Automation Conference (DAC), pp. 502-507, Anaheim, California, USA, July 2003.

  8. C. P. Sotiriou and L. Lavagno, Desynchronisation: Asynchronous Circuits from Syn- chronous Specifications, Proceedings of the IEEE International SOC 2003 Conference, 4 pages, Portland, Oregon, USA, September 2003.

  9. Fotis Plessas, Grigorios Kalivas, "Locking Techniques For RF Oscillators at 5-6 GHz Frequency Range", in Proc. 10th IEEE International Conference on Electronics, Circuits and Systems, United Arab Emirates, December 14 -17, 2003.

  10. C. P. Sotiriou and Y. Papaefstathiou, Design-Space Exploration of a Cryptography Algorithm, Proceedings of the 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 858-861, Vol. 2, United Arab Emirates, December 2003.

  11. Fotis Plessas, Grigorios Kalivas, "A 5 GHz Low noise Amplifier On 0.35um BiCMOS SiGe", in Proc. 10th IEEE International Conference on Electronics, Circuits and Systems, United Arab Emirates, December 14 -17, 2003.

  12. A. Efthymiou and C. P. Sotiriou, 3LSSD: Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits, Proceedings of the Design Automation and Test in Europe Conference (DATE), pp. 672-673, Vol. 1, Paris, February 2004.

  13. R. Dobkin, R. Ginosar and C. P. Sotiriou, Data Synchronisation Issues in GALS SoCs, Proceedings of the 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 170-180, Crete, Greece, 2004.

  14. I. Blunno, J. Cortadella, A. Kondratyev, L. Lavagno, K. Lwin and C. P. Sotiriou, Handshake Protocols for De-Synchronisation, Best Paper Award, Proceed- ings of the 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 149-158, Crete, Greece, 2004. (Received Best Paper Award)

  15. Fotis Plessas, Grigorios Kalivas, "A 5-GHz, Variable Gain, SiGe Low Noise Amplifier", in Proc. 24th International Conference on Microelectronics, Nis, Serbia and Montenegro, May 16-19, 2004.

  16. Fotis Plessas, Sofia Vatti, Grigorios Kalivas, "Design and Implementation of a Dual-Loop Frequency Synthesizer for 5 GHz WLANs", in Proc. 24th International Conference on Signals and Electronic Systems, Poznan, Poland, September 13-15, 2004.

  17. J. Cortadella, A. Kondratyev, L. Lavagno and C. P. Sotiriou, Coping with the variability of combinational logic delays, Proceedings of the 2004 IEEE International Con- ference on Computer Design (ICCD 2004), 4 pages, San Jose, October 2004.

  18. V. Zebilis, C. P. Sotiriou, Controlling Event Spacing in Self-Timed Rings, Proceed- ings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 109 - 115, New York City, USA, March 2005.

  19. E. Kasapaki, P. Matthaiakis and C. P. Sotiriou, Actual Delay Circuits on FPGA : Trading-Off LUTS for Speed, Proceedings of the 16th IEEE International Conference on Field Programmable Logic and Applications, 6 pages, Spain, August 2006.

  20. Fotis Plessas, A. Papalambrou and Grigorios Kalivas, "A Subharmonic Injection-Locked Self-Oscillating Mixer", in Proc. 2007 IEEE International Symposium on Circuits and Systems, New Orleans, May 27-30, 2007.

  21. N. Andrikos, L. Lavagno, D. Pandini and C. P. Sotiriou, A Fully-automated Desyn- chronization Flow for Synchronous Circuits, Proceedings of the 44th ACM/IEEE Design Automation Conference (DAC), 6 pages, San Diego, California, USA, June 2007.

  22. Fotis Plessas, PhD Research abstract, "Electronic Circuit Subsystems for Broadband Wireless Applications", in Proc. EDAA PhD forum 2008 in conjunction with the Design, Automation and Test in Europe Conference (DATE), Munich, Germany, March 10-14, 2008.

  23. A. Alexandropoulos, E. Davrazos, F. Plessas, M. Birbas, "A novel 1.8V, 1066Mbps, DDR2, DFI-compatible Memory Interface", in Proc. 2010 IEEE Annual Symposium on VLSI, Kefalonia, Greece, July 5-7, 2010.

  24. A. Alexandropoulos, F. Plessas, M. Birbas, "A dynamic DFI-compatible strobe qualification system for Double Data Rate (DDR) Physical Interfaces", in Proc. 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010), Athens, December 12-15, 2010.

  25. G. Giannakas, F. Plessas, G. Nassopoulos, G. Stamoulis, "A 2.45GHz power harvesting circuit in 90nm CMOS", in Proc. 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010), Athens, Greece, December 12-15, 2010.

  26. E. Kounalakis and C. P. Sotiriou, SCPlace: A Statistical Slack-Assignment Based Constructive Placer, Proceedings of the International Symposium on Quality Electronic Design (ISQED), 6 pages, Santa Clara, Califoria, USA, March 2011.

  27. E. Kounalakis and C. P. Sotiriou, CPlace: A Constructive Placer for Synchronous and Asynchronous Circuits, Proceedings of the 17th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 6 pages, Ithaca, NY, USA, April 2011.

  28. E. Kounalakis and C. P. Sotiriou, Statistical Timing-Based Post-Placement Leak- age Recovery, Proceedings of the IEEE Computer Society Annual Symposium on VLSI, (ISVLSI), 6 pages, Chennai, India, July 2011.

  29. F. Plessas, V. Panagiotopoulos, V. Kalenteridis, G. Souliotis, F. Liakou, S. Koutsomitsos, S. Siskos, A. Birbas, "A 60-GHz Quadrature PLL in 90nm CMOS", in 18th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2011), Beirut, Lebanon, December 11-14, 2011.

  30. V. Kalenteridis, F. Plessas, V. Panagiotopoulos, S. Siskos, "Building blocks for a 15 GHz PLL in deep-submicron technology", in Pan-Hellenic Conference on Electronics and Telecommunications (PACET) 2012, Thessaloniki, Greece, March 16-18, 2012.

  31. C. Vassou, F. Plessas, N. Terzopoulos, "A variable gain wideband CMOS low-noise amplifier for 75 MHz-3 GHz wireless receivers", in 20th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2013), Abu Dhabi, UAE, December 8-11, 2013.

  32. P. M. Mattheakis, C. P. Sotiriou and P. Beerel, A Polynomial Time Flow for Imple- menting Free-Choice Petri-Nets, Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), 6 pages, Quebec, Canada, September 2012.

  33. P. M. Mattheakis and C. P. Sotiriou, Polynomial Complexity Asynchronous Control Circuit Synthesis of Concurrent Specifications based on Burst-Mode FSM Decomposition, Proceedings of the 26th IEEE International Conference on VLSI Design (VLSID), 6 pages, Pune, India, January 2013.

  34. Ioannis Zographopoulos, Fotios Plessas, "A 16-GHz Differential LC-VCO in 16-nm CMOS", in Pan-Hellenic Conference on Electronics and Telecommunications (PACET) 2015, Ioannina, Greece, May 8-9, 2015.

  35. N. Penmetsa, C. P. Sotiriou and S. K. Lim, Low Power Monolithic 3D IC Design of Asynchronous AES Core, Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 7 pages, Mountain View, California, USA, May 2015.

  36. R. Diamant, R. Ginosar and C. P Sotiriou, Asynchronous Sub-Threshold Ultra-Low Power Processor, Proceedings of the 25th International Workshop on Power and Timing Modelling, Optimization and Simulation (PATMOS), 8 pages, Bahia, Brazil, September 2015.

  37. Emmanouil Antonopoulos, Fotis Plessas, Fotis Foukalas, Ioannis Zographopoulos, "Heterogeneous Spectrum Bands Aggregation Prototype with Cognitive Radio Capabilities", in 2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS 2015), Tel Aviv, Israel, November 2-4, 2015.

  38. Ioannis Zographopoulos, Fotis Plessas, Emmanouil Antonopoulos, Fotis Foukalas, "A 16-nm FinFET 16-GHz Differential LC-VCO", in 2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS 2015), Tel Aviv, Israel, November 2-4, 2015.

  39. N. Sketopoulos, C. P. Sotiriou and S. Simoglou, Abax: 2D/3D Legaliser Supporting Look-Ahead Legalisation and Blockage Strategies, Proceedings of the Design Automation and Test in Europe (DATE) Conference, 4 pages, Dresden, Germany, March 2018.

JOURNALS

  1. F. Plessas, A. Miaoudakis, Gr. Kalivas, K. Efstathiou, "Wireless Data Transfer System", Tehnika, vol. 178, January 2002, pp. 82-87.

  2. I. Papaefstathiou, V. Papaefstathiou and C. Sotiriou, Design-Space Exploration of the most widely used Cryptography Algorithms, in Elsevier Journal on Microprocessors and Microsystems, special issue on Secure Computing Platforms, 4 pages, 2003.

  3. Fotis Plessas, Paschalis Simitsakis, Grigorios Kalivas, "Design and Implementation of a DCS 1800 Receiver", Tehnika a Elektrotehnika, vol. 53, no. 6, 2004 pp. 1-8.

  4. Fotis Plessas, Sofia Vatti and Grigorios Kalivas, "A Theoretical and Experimental Study of the Phase Noise Behaviour of a Dual-Loop Frequency Synthesizer for 5-GHz WLANs", Journal of Circuits, Systems and Computers, vol. 16, no. 4, Aug 2007, pp. 577-588.

  5. Fotis Plessas, Grigorios Kalivas, "A 5-GHz Injection-Locked Phase Locked Loop", Microwave and Optical Technology Letters, vol. 46, no. 1, July 2005, pp. 80-84.

  6. J. Cortadella, A. Kondratyev, L. Lavagno and C. Sotiriou, De-synchronization: synthesis of asynchronous circuits from synchronous specifications, IEEE Transactions on Computer-Aided Design (IEEE-TCAD), Volume 25, Issue 10, pp. 1904-1921, 15 pages, October 2006.

  7. R. Dobkin, R. Ginosar and C. P. Sotiriou, High Rate Data Synchronization in GALS SoCs, Publication in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, (IEEE-VLSI), Volume 14, Issue 10, pp. 1063-1074, 16 pages, 2006.

  8. Fotis Plessas and Grigorios Kalivas, "A Subharmonically Injected Phase Locked Loop for 5-GHz Applications", Microwave and Optical Technology Letters, vol. 48, no. 11, Nov. 2006, pp. 2158-2162.

  9. Fotis Plessas, A. Papalambrou and Grigorios Kalivas, "Subharmonic injection locking and self-oscillating mixing", International Journal of Circuit Theory and Applications, vol. 37, Issue 3, Apr. 2009, pp. 479-502.

  10. E. Lourandakis, F. Plessas and Grigorios Kalivas, "A 0.5 - 5.5 GHz Distributed Low Noise Amplifier", ECTI Transactions on Electrical Engineering, Electronics and Communications, vol. 6, Feb. 2008, pp. 26-31.

  11. Fotis Plessas, A. Papalambrou and Grigorios Kalivas, "A 5-GHz Subharmonic Injection-Locked Oscillator and Self-Oscillating Mixer", IEEE Transactions on Circuits and Systems II, vol. 55, no. 7, July 2008, pp. 633-637.

  12. Athanasios Tsitouras, Fotis Plessas, "Ultra wideband, low-power, 3-5.6 GHz CMOS voltage-controlled oscillator", Microelectronics Journal, vol. 40, Issue 6, June 2009, pp. 897-904.

  13. Athanasios Tsitouras, Fotis Plessas, "Ultra-Wideband, Low-Power, Inductorless, 3.1-4.8 GHz, CMOS VCO", Circuits, Systems and Signal Processing, vol. 30, no. 2, Apr. 2011, pp. 263-285.

  14. Fotis Plessas, "A study of superharmonic injection locking in multiband frequency dividers", International Journal of Circuit Theory and Applications, vol. 39, Issue 4, April 2011, pp. 397-410.

  15. Fotis Plessas, Athanasios Tsitouras and G. Kalivas, "Phase noise characterization of subharmonic injection locked oscillators", International Journal of Circuit Theory and Applications, vol. 39, Issue 7, July 2011, pp. 791-800.

  16. Athanasios Tsitouras, Fotis Plessas and G. Kalivas, "A linear, ultra wideband, low power, 2.1-5 GHz VCO", International Journal of Circuit Theory and Application, vol. 39, Issue 8, Aug. 2011, pp. 823-833.

  17. F. Plessas A. Tsitouras, and G. Kalivas, "5-GHz fully differential multifunctional circuit", International Journal of Electronics, vol. 99, Issue 9, pp. 1317-1322.

  18. F. Plessas, F. Gioulekas, and G. Kalivas, "Phase noise performance of fully differential sub-harmonic injection-locked PLL", IET Electronics Letters, vol. 46, Issue 19, Sep. 2010, pp.1319-1321.

  19. F. Plessas, E. Davrazos, A. Alexandropoulos, M. Birbas, "A 1-GHz, DDR2/3 SSTL Driver with On-Die Termination, Strength Calibration, and Slew Rate Control", Computers and Electrical Engineering, vol. 38, no. 2, Mar. 2012.

  20. F. Plessas, A. Alexandropoulos, S. Koutsomitsos, E. Davrazos, M. Birbas, "Advanced Calibration Techniques for High Speed Source-Synchronous Interfaces", IET Computers & Digital Techniques, vol. 5, Issue 5, Sep. 2011, pp. 366-374.

  21. A. Tsitouras, F. Plessas, M. Birbas, J. Kikidis, G. Kalivas, "A sub-1V supply CMOS voltage reference generator", International Journal of Circuit Theory and Applications, vol. 40, Issue 8, Aug. 2012, pp. 745-758.

  22. A. Tsitouras, F. Plessas, M. Birbas, G. Kalivas, "A 1 V CMOS Programmable Accurate Charge Pump with Wide Output Voltage Range", Microelectronics Journal, vol. 42, Issue 9, Sep. 2011, pp. 1082-1089.

  23. G. Giannakas, F. Plessas, G. Stamoulis, "A pseudo-FG technique for efficient energy harvesting", IET Electronics Letters, vol. 48, no. 9, April 2012.

  24. G. Souliotis, F. Plessas, F. Liakou, M. Birbas, "A 90nm CMOS 15/60 GHz frequency quadrupler", International Journal of Electronics, (published online: Dec 2012).

  25. Nikolaos Terzopoulos, Costas Laoudias, Fotis Plessas, George Souliotis, Sotiris Koutsomitsos and Micael Birbas, "A 5Gbps USB3.0 Transmitter and Receiver Linear Equalizer", International Journal of Circuit Theory and Applications, 43(7), pp. 900 - 916, July 2015.

  26. George Souliotis, Costas Laoudias, Fotis Plessas and Nikolaos Terzopoulos, "Phase interpolator with improved linearity", Circuits, Systems and Signal Processing, published online: May 29, 2015 (DOI: 10.1007/s00034-015-0082-9).

  27. George Souliotis, Fotis Plessas, Spyridon Vlassis, "A high accuracy voltage reference generator", Microelectronics Journal, vol. 75, Issue 9, May 2018, pp. 61-67.

  28. Fotis Plessas, George Souliotis, and Rodoula Makri, "A 76–84 GHz CMOS 4× Subharmonic Mixer With Internal Phase Correction", IEEE Transactions on Circuits and Systems I, vol. 65, no. 7, July 2018, pp. 2083 - 2096.

PATENTS

  1. C. P. Sotiriou, Asynchronous, Multi-Rail, Asymmetric-Phase, Static Digital Logic and Method for Designing the Same, U.S. P.T.O. Priority Application US11/283,070

  2. C. P. Sotiriou, System and Method of Determining the Speed of Digital Application Spe- cific Integrated Circuits - Speed Gauge, U.S. P.T.O. Priority Application US11/315,309, Issued January 2008 - Patent #7,318,003

  3. C. P. Sotiriou, System and Method of Determining the Speed of Digital Application Spe- cific Integrated Circuits - Error Signal, U.S. P.T.O. Priority Application US11/330,350

  4. C. P. Sotiriou and S. Lymperis, Apparatus And Method For Optimizing Delay Elements In Asynchronous Digital Circuits, U.S. P.T.O. Priority Application US11/933,230

  5. C. P. Sotiriou, System And Method for Reducing EME Emissions in Digital Desynchro- nized Circuits, U.S. P.T.O. Priority Application US112/003,468

BOOK CHAPTERS

  1. F. Plessas, N. Terzopoulos, "60 GHz Millimeter-Wave WLANs and WPANs: Introduction, System Design, and PHY Layer Challenges", System-Level Design Methodologies for Telecommunication, Springer, 2014, pp. 63-78.

REFEREED WORKSHOP PAPERS

  1. Emmanouil-Aris Antonopoulos, Fotis Plessas, Fotis Foukalas, "RF Prototype for Dynamic Cognitive Carrier Aggregation of Heterogeneous Dispersed Bands", in the Twelfth International Symposium on Wireless Communication Systems (ISWCS'15), WSH4: Third Workshop on Cognitive Radio for Fifth Generation Networks and Spectrum (CRAFT 2015), August 25th - 28th, 2015, Brussels, Belgium.

INVITED TALKS, EVENTS & REPORTS

  1. F. Plessas, "Digital Wireless Communication Techniques Seminar - Lecture 4: Wireless Channel Modeling: Small-Scale Fading and Multipath", IEEE TESYD Student Branch, Nafpaktos, Greece, May 11, 2012.

  2. F. Plessas, "Millimeter-Wave WLANs & WPANs: Introduction, system design, and PHY layer challenges", in the 3rd IEEE Greece GOLD A.G. ATHENA Summer School, Pyrgos, Greece, July 1-6, 2012.

  3. F. Plessas, "Analog Interface Design", in the Wireless Sensor Node Circuit and System Design - Wise Design 2015 workshop, powered by "IEEE CASS Outreach Initiative 2015", Aristotle University, Greece, Dec. 7 & 8, 2015.

  4. Fotis Plessas, Evaggelos Tsimpinos, Rodoula Makri, "Sub-Harmonic Mixer and Low Noise Amplifier for 70-90 GHz single chip solutions", in Europractice IC Service, Activity Report 2015.